1. Field of the Invention
The present invention relates to a semiconductor chip, and more particularly, to a semiconductor chip with a shielding structure.
2. Description of the Related Art
Along with the performance improvements of the integrated circuit (IC) chip, the transmission frequency of the electronic signals in the IC chip increases continuously. However, when the frequency of the electronic signals is increased to a high-frequency range, for example, higher than 10 GHz, the electronic signals inside the IC chip can easily be interfered by the noises.
FIG. 1 is a partial schematic view of a conventional IC chip. FIG. 2 is a top view of the IC chip in FIG. 1. Referring to FIGS. 1 and 2, the IC chip 100 mainly comprises a substrate 110, a metal interconnection structure 120, a plurality of signal contacts 130, and a plurality of ground contacts 140. More particularly, many active solid-sate devices are disposed on a surface 112 of the substrate 110. For example, the active solid-state devices are the bipolar junction transistors (BJT) or the field-effect transistors (FET) disposed on the silicon substrate. The metal interconnection structure 120 consists of the insulating layers and the conductive layers sequentially disposed on the surface 112 of the substrate 110, and the signal contacts 130 and the ground contacts 140 are both disposed on a surface of the metal interconnection structure 120.
In addition, in order to prevent the signal contacts 130 from being interfered by the noise, a guard ring 122 design is further applied. Specifically, in the conventional technique, the guard rings 122 surround the periphery of the signal contacts 130, and the guard ring 122 is electrically coupled to the ground contact 140 through a trace 124. Accordingly, when a ground line 150 is electrically coupled to the ground contact 140 and a ground (not shown) by a wire bonding process in the conventional technique, the guard ring 122 can be electrically coupled to the ground outside of the IC chip 100 through the trace 124, the ground contact 140, and the ground line 150.
In general, when the operation frequency of the IC chip 100 is in a low-frequency range, since the parasitic phenomenon between the guard ring 122 and the ground can be ignored. For example, the be-ignored parasitic phenomenon includes the parasitic inductance between the trace 124, the ground contact 140, and the ground line 150. Thus, the noise on the signal contact 130 is smoothly expelled from the IC chip 100 through the guard ring 122, the trace 124, the ground contact 140, and the ground line 150. Accordingly, when the electronic signal is in the low-frequency range, the guard ring 122 design in the conventional technique can protect the signal contact 130 from been interfered by the noise.
However, when the operation frequency of the IC chip 100 is in a high-frequency range, the above-mentioned parasitic phenomenon induced by the trace 124, the ground contact 140, and the ground line 150 cannot be ignored. Specifically, since the guard ring 122 is electrically coupled to the ground contact 140 through the trace 124, if the guard ring 122, the trace 124, the ground contact 140, and the ground line 150 are regarded as a whole, and the reactance induced by the parasitic phenomenon is increased along with the rising of the operation frequency of the IC chip 100.
When the reactance induced by the parasitic phenomenon exceeds a threshold value, the noise on the signal contact 130 can not be smoothly expelled from the IC chip 110 to the ground through the guard ring 122. In other words, when the operation frequency of the IC chip 100 is in the high-frequency range, the guard ring 122 gradually loses its capability of protecting the signal contact 130 and the high-frequency electronic signal transmitted through the signal contact 130 is easily interfered by the noise, which deteriorates the performance of the IC chip 100.